MOSFET Differential Pair

The effect of channel length modulation

In the two previous articles, we introduced the actively loaded MOSFET differential pair and discussed two prominent advantages of this configuration—namely, improved biasing (compared to the use of drain resistors) and differential-to-single-ended conversion without loss of gain.

Now it’s time to analyze the differential gain of this circuit; before we can determine the gain, though, we need to understand the concept of small-signal output resistance and how we incorporate this resistance into our analysis. (If you’re not sure what I mean by “small-signal,” take a look at the “Two Outputs or One?” section in this article.)

The first thing to understand is that small-signal output resistance is not an inherent, precise property of a real MOSFET. Rather, it is a model that we use to account for the effect of channel-length modulation on a MOSFET’s small-signal behavior. Recall that MOSFETs used for linear amplification are typically biased in the saturation region, which corresponds to when the FET’s channel is “pinched off” at the drain end.

In a simplified analysis, we use the following equation for saturation-mode drain current:

ID=12μnCoxWL(VGSVTH)2ID=12μnCoxWL(VGS−VTH)2

This equation conveys the assumption that drain current is not affected by the drain-to-source voltage. The MOSFET acts like a dependent current source controlled by the overdrive voltage VOV, where VOV = VGS – VTH. This assumption is based on the idea that increasing the drain-to-source voltage does not alter the channel once it has become pinched off.

As you’ve probably noticed, though, the real world is not particularly conducive to idealized situations such as this.

The reality is that increasing the drain-to-source voltage does have a nontrivial effect on the channel: the pinch-off point is moved toward the source, and the result is more drain-to-source current as drain-to-source voltage increases. This means that we need an additional circuit element to account for this additional current, and by now you have probably guessed that the element we’re looking for is a resistor—namely, the small-signal output resistance ro.

So now we have a MOSFET, which is still assumed to be immune to increasing drain-to-source voltage, in conjunction with an ordinary resistor, which (like any resistor) has a current flow equal to the voltage across the resistor divided by the resistance. As drain-to-source voltage increases, more current flows through the resistor, and this current compensates for the lack of change in the drain current of the idealized MOSFET. By combining these two currents—drain current of the idealized FET and current through the resistor—we can find the total drain current for a real MOSFET.

Ignoring channel-length modulation is equivalent to assuming that the small-signal output resistance of the FET is infinite. It follows, then, that higher output resistance is desirable if we want a MOSFET to behave more like the idealized component in which drain current is not influenced by drain-to-source voltage. As we will see later, small-signal output resistance is determined in part by the FET’s DC bias current, so we do have some ability to increase the output resistance of a given device.

One last note before we move on: Output resistance is itself a simplification of real MOSFET behavior. The subatomic action taking place in a MOSFET’s channel is not exactly straightforward, and it comes as no surprise to me that the simple linear relationship represented by a drain-to-source resistor is not the whole story.